Natasha_
Newbie
I am trying to do a four point fft with the following code. But the code is showing the following error message. Can you give me the solution for this problem?
Main code:
Testbench:
On running the simulation,
ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.
[Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation.
[USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'C:/Users/HP/fft_4point/fft_4point.sim/sim_1/behav/xsim/elaborate.log' file for more information.
Can someone please help me solve this?
Main code:
Code:
module TwiddleFactorROM (
input wire [7:0] address,
output reg signed [15:0] custom_real,
output reg signed [15:0] custom_imag
);
// Define the twiddle factors for a 4-point FFT
reg [15:0] twiddle_factors [0:3];
// Initialize the twiddle factors
initial begin
twiddle_factors[0] = 16'h7FFF;
twiddle_factors[1] = 16'h0000;
twiddle_factors[2] = 16'h0000;
twiddle_factors[3] = 16'hFFFF;
// Add more initialization if needed
end
// Output the twiddle factors based on the input address
always @* begin
custom_real = twiddle_factors[2*address];
custom_imag = twiddle_factors[2*address + 1];
end
endmodule
module Butterfly (
input wire [15:0] A_real, A_imag,
input wire [15:0] B_real, B_imag,
input wire [15:0] W_real, W_imag,
output reg [15:0] Sum_real,
output reg [15:0] Sum_imag,
output reg [15:0] Diff_real,
output reg [15:0] Diff_imag
);
always @* begin
// Butterfly computation
Sum_real = A_real + (W_real * B_real - W_imag * B_imag);
Sum_imag = A_imag + (W_real * B_imag + W_imag * B_real);
Diff_real = A_real - (W_real * B_real - W_imag * B_imag);
Diff_imag = A_imag - (W_real * B_imag + W_imag * B_real);
end
endmodule
module fft_4point (
input wire clk,
input wire rst,
input wire signed [15:0] x0_real, x0_imag, x1_real, x1_imag, x2_real, x2_imag, x3_real, x3_imag,
output reg signed [15:0] X0_real, X0_imag, X1_real, X1_imag, X2_real, X2_imag, X3_real, X3_imag
);
// Memory for temporary results
reg signed [15:0] temp_X0_real, temp_X0_imag, temp_X1_real, temp_X1_imag, temp_X2_real, temp_X2_imag, temp_X3_real, temp_X3_imag;
// Registers for twiddle factors
reg signed [15:0] W0_real, W0_imag, W1_real, W1_imag, W2_real, W2_imag, W3_real, W3_imag;
// Twiddle factor ROM
TwiddleFactorROM twiddle_rom_stage1 (
.address(0),
.custom_real(W0_real),
.custom_imag(W0_imag)
);
TwiddleFactorROM twiddle_rom_stage2 (
.address(1),
.custom_real(W1_real),
.custom_imag(W1_imag)
);
TwiddleFactorROM twiddle_rom_stage3 (
.address(2),
.custom_real(W2_real),
.custom_imag(W2_imag)
);
// Butterfly modules
Butterfly stage1_butterfly (
.A_real(x0_real), .A_imag(x0_imag),
.B_real(x2_real), .B_imag(x2_imag),
.W_real(W0_real), .W_imag(W0_imag),
.Sum_real(temp_X0_real), .Sum_imag(temp_X0_imag),
.Diff_real(temp_X1_real), .Diff_imag(temp_X1_imag)
);
Butterfly stage2_butterfly (
.A_real(x1_real), .A_imag(x1_imag),
.B_real(x3_real), .B_imag(x3_imag),
.W_real(W1_real), .W_imag(W1_imag),
.Sum_real(temp_X2_real), .Sum_imag(temp_X2_imag),
.Diff_real(temp_X3_real), .Diff_imag(temp_X3_imag)
);
Butterfly stage3_butterfly (
.A_real(temp_X1_real), .A_imag(temp_X1_imag),
.B_real(x3_real), .B_imag(x3_imag),
.W_real(W2_real), .W_imag(W2_imag),
.Sum_real(X0_real), .Sum_imag(X0_imag),
.Diff_real(X2_real), .Diff_imag(X2_imag)
);
Butterfly stage4_butterfly (
.A_real(temp_X2_real), .A_imag(temp_X2_imag),
.B_real(temp_X3_real), .B_imag(temp_X3_imag),
.W_real(W3_real), .W_imag(W3_imag),
.Sum_real(X1_real), .Sum_imag(X1_imag),
.Diff_real(X3_real), .Diff_imag(X3_imag)
);
// First stage of butterfly
always @(posedge clk or posedge rst) begin
if (rst) begin
// Reset state
temp_X0_real <= 0;
temp_X0_imag <= 0;
W0_real <= 16'h0; // Reset W0_real
W0_imag <= 16'h0; // Reset W0_imag
end
else begin
// Get twiddle factors for the first stage
W0_real <= twiddle_rom_stage1.custom_real;
W0_imag <= twiddle_rom_stage1.custom_imag;
// Butterfly computation for the first stage
stage1_butterfly.compute();
end
end
// Second stage of butterfly
always @(posedge clk or posedge rst) begin
if (rst) begin
// Reset state
temp_X1_real <= 0;
temp_X1_imag <= 0;
end
else begin
// Get twiddle factors for the second stage
W1_real <= twiddle_rom_stage2.custom_real;
W1_imag <= twiddle_rom_stage2.custom_imag;
// Butterfly computation for the second stage
stage2_butterfly.compute();
end
end
// Third stage of butterfly
always @(posedge clk or posedge rst) begin
if (rst) begin
// Reset state
temp_X2_real <= 0;
temp_X2_imag <= 0;
end
else begin
// Get twiddle factors for the third stage
W2_real <= twiddle_rom_stage3.custom_real;
W2_imag <= twiddle_rom_stage3.custom_imag;
// Butterfly computation for the third stage
stage3_butterfly.compute();
end
end
// Fourth stage of butterfly
always @(posedge clk or posedge rst) begin
if (rst) begin
// Reset state
temp_X3_real <= 0;
temp_X3_imag <= 0;
end
else begin
// Get twiddle factors for the fourth stage (identity factors for the last stage)
W3_real = 16'h1;
W3_imag = 16'h0;
// Butterfly computation for the fourth stage
stage4_butterfly.compute();
end
end
endmodule
Code:
module fft_4point_tb;
// Parameters
parameter CLK_PERIOD = 10; // Clock period in ns
// Signals
reg clk;
reg rst;
reg signed [15:0] x0_real, x0_imag, x1_real, x1_imag, x2_real, x2_imag, x3_real, x3_imag;
reg signed [15:0] X0_real, X0_imag, X1_real, X1_imag, X2_real, X2_imag, X3_real, X3_imag;
// Instantiate the fft_4point module
fft_4point uut (
.clk(clk),
.rst(rst),
.x0_real(x0_real), .x0_imag(x0_imag),
.x1_real(x1_real), .x1_imag(x1_imag),
.x2_real(x2_real), .x2_imag(x2_imag),
.x3_real(x3_real), .x3_imag(x3_imag),
.X0_real(X0_real), .X0_imag(X0_imag),
.X1_real(X1_real), .X1_imag(X1_imag),
.X2_real(X2_real), .X2_imag(X2_imag),
.X3_real(X3_real), .X3_imag(X3_imag)
);
// Clock generation
initial begin
clk = 0;
forever #((CLK_PERIOD)/2) clk = ~clk;
end
// Reset generation
initial begin
rst = 1;
#20 rst = 0; // De-assert reset after 20 time units
end
// Test sequence
initial begin
// Provide input values in binary
x0_real = 16'b0001001000110100; x0_imag = 16'b0101011001111000;
x1_real = 16'b1010101111001101; x1_imag = 16'b1110111101111000;
x2_real = 16'b0100001100100001; x2_imag = 16'b1000011101100101;
x3_real = 16'b1101110010111010; x3_imag = 16'b1100111101111110;
// Wait for a few clock cycles
#100;
// Display output values in binary
$display("Output values after simulation:");
$display("X0_real = %b, X0_imag = %b", X0_real, X0_imag);
$display("X1_real = %b, X1_imag = %b", X1_real, X1_imag);
$display("X2_real = %b, X2_imag = %b", X2_real, X2_imag);
$display("X3_real = %b, X3_imag = %b", X3_real, X3_imag);
// Stop the simulation
$stop;
endERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.
[Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation.
[USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'C:/Users/HP/fft_4point/fft_4point.sim/sim_1/behav/xsim/elaborate.log' file for more information.
Can someone please help me solve this?
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