lattice isplsi - input registers for internal logic

[kryoutloud]

lattice isplsi

does anyone have an idea for using the input registers for internal logic

 

[marcosax]

Re: lattice isplsi

does anyone have an idea for using the input registers for internal logic

What do you really need?
There are free tools from Lattice like ispLEVER. You can use VERILOG or VHDL to do logic.
Try Lattice support. They are very efficient and fast
techsupport@latticesemi.com

 

[kryoutloud]

I#m using isplever already. but used all registers in an 1023ea device already and saw that also the inputs can be registered. So I'm trying to find out howe to use this registers from internal logic for internal logic

 

[usbman]

I#m using isplever already. but used all registers in an 1023ea device already and saw that also the inputs can be registered. So I'm trying to find out howe to use this registers from internal logic for internal logic

I don't think there will be any way to use the input regs as source for
internal signals. If you look at the GLBS you can see that these Regs
are only for input latchs.

usbman

 

[Hero]

Re: lattice isplsi

Hi,

Yes it is possible but only in some limited casess. For example if you have bidirectional 8 bit external data bus and you need to write data from bus in internal 8-bit or less register you can use IOC registers for this. In some cases Lattice compiler recognize this situation and automatically uses IOC registers instead GLB registers.

To enable IOC registers you need to use appropriated PLSI property directives. This technique may be used only for external IO pin signals not for internal signals from GLBs.

Regards