labview and labview fpga module

[princesse91]

Hello,
I want to determine the execution time in labview fpga but i didn't know how.. Can anybody help me please??
Thanks in advance

 

[std_match]

If you use the "single cycle timed loop" the speed is only limited by the FPGA chip. If you describe the same logic in VHDL/Verilog and in LabView FPGA, they should have the same performance.

 

[princesse91]

@std_match,
I am sorry but i didn't understand what you said.. In fact, I don't use the "single cycle timed loop" , i just do a simple code of addition: two input and one output with the additionnal but i didn't know how to determine the execution time.

 

[ladik]

You can measure the cycle time for the FPGA follows: