Ian,
There isnt a limitation on TCK in the 1149.1 standard itself. Like any synchronous data transmission there is a limit as to how much effort will be put into the IC design. Most devices top out at 50 or 60Mhz. This is fairly reasonable throughput for a full duplex ( 50mbits/sec of data going in two directions) protocol that is LVTTL based.
High speed links such as PCIe are based on LVDS, low voltage differential signaling. 1149.7 only advantage is the use of two pins, but this ends up being slower since it is half-duplex and has latency to turn the data stream around.
The other limit is due to routing TCK/TMS at the board level. Driving TCK/TMS with many end-points (inputs to each chip) over cable can limit frequency. A Scan Ring linker can give you more point-to-point routing and re-timing of the JTAG signals relative to TCK. Read more:
JTAG linker
Hope it helps.
Cindy