Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

jitter question, synchonizing two clocks

Status
Not open for further replies.

zuzu

Member level 3
Joined
Jul 10, 2007
Messages
54
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,288
Activity points
1,817
Hello friends,

Can someone give me a little advice? I have a (quite pure) sine clock at about 12MHz and I need to multiply it 10 times to obtain 120MHz square. The question is originally jitter is multiplicative? Do I need to use dedicated multipliers like those:

http://focus.ti.com/lit/ds/symlink/cdce913.pdf
http://www.analog.com/static/imported-files/data_sheets/AD9552.pdf

In fact, I want to phase synchronize 12MHz with another reference, and I plan to count (FLL loop) the 12MHz pulses. For better phase accuracy I thought to count 10x faster, by multiplying input.

Any thoughts appreciated,
 

biff44

Advanced Member level 5
Joined
Dec 24, 2004
Messages
4,831
Helped
1,354
Reputation
2,704
Reaction score
1,031
Trophy points
1,393
Location
New England, USA
Activity points
36,482
Don't know what your budget is, but if it were me I would take a 120 MHz VCXO, and phase lock it to your 12 MHz system clock (assuming you need to do that at all). THen you would have very low time jitter clock, and not have to worry about any cycle slipping.
 
Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top