fala
Full Member level 5
Hello, In jfet specifications, there is a parameter called drain cutoff current ,Id(off),it means when jfet is off (eg. Gate = -8V) drain still has a residual current which is usually in range of pA(typ. value) or nA(max. value) there is also another leakage parameter called gate reverse current, Igss, It means reverse biased gate leakage current which is also usually in range of pA(typ. value) or nA(max. value), Test conditions(temperature and Vds) for both typical and max values are the same as specified in datasheet. Now my questions:
1-typical range given in datasheet is acceptable for my design but max leakage is unacceptable. It has not been mentioned in what conditions I should expect typical leakage and in what conditions I should expect max condition. On the contrary both are specified for the same test conditions. So what should I consider for design, typical value or max value?
2-Does drain cutoff current Id(off) includes its possible leakage to gate or it only is a measure of drain to source current when jfet is off?
3-How can I minimize drain leakage to pA or even sub pA range, if it is possible?
Thank you very much, also I greatly appreciate a reference to any material that covers the subject thoroughly.
1-typical range given in datasheet is acceptable for my design but max leakage is unacceptable. It has not been mentioned in what conditions I should expect typical leakage and in what conditions I should expect max condition. On the contrary both are specified for the same test conditions. So what should I consider for design, typical value or max value?
2-Does drain cutoff current Id(off) includes its possible leakage to gate or it only is a measure of drain to source current when jfet is off?
3-How can I minimize drain leakage to pA or even sub pA range, if it is possible?
Thank you very much, also I greatly appreciate a reference to any material that covers the subject thoroughly.
