chd123
Newbie level 5

Hi all..
I have been trying to simulate j k flip flop with preset and clear in cadence using nand gates and one using d flip flop but the output
is not varying it is always d same.. I have tried to do in different ways ,using nor gates master slave.. but never got d output..
plz help me by telling an efficient way to design d flip flop in cadence
thank u
I have been trying to simulate j k flip flop with preset and clear in cadence using nand gates and one using d flip flop but the output
is not varying it is always d same.. I have tried to do in different ways ,using nor gates master slave.. but never got d output..
plz help me by telling an efficient way to design d flip flop in cadence
thank u