po.pe
Newbie
I'm struggling to get my design on the ECP5 Versa board running. Currently it's just for hardware verification so there's not much going on, I simply try to get an LED blinking. So this is my top entity...
But beside of the static assignments, nothing works
so SOD(0) that should be flickering with approximately 1Hz is just statically '0' so it seems that the oscillator doesn't work. I first tried to use the external 100MHz oscillator but that also didn't work. The PLL and the OSC component seem to be infered according to the build report
OSC 1/1 100% used
PLL 1/4 25% used
Another thing that puzzles me is the following message during synthesis
WARNING - I/O Port SOD[6] 's net has no driver and is unused.
But SOD[6]'s driver should be ds[0] which is assigned to the dip switch pin H2
This is the first time I'm using Diamond and the ECP5 and I don't know if I have to include something more in my project or if the usage of the library components is wrong. It's hard to find any reference for such a design.
Does anyone have an idea where I made a mistake or has some simple project laying around that compiles for the ECP5 Versa?
Code:
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE work.config_package.ALL;
ENTITY top_entity IS
PORT(
SYSCLK : IN std_logic;
CLKOUT : OUT std_logic;
SOD : OUT std_logic_vector(73 DOWNTO 0);
ds : IN std_logic_vector(5 downto 0)
);
END ENTITY top_entity;
ARCHITECTURE rtl OF top_entity IS
SIGNAL osc, clk_160m, clk_50m, clk_i, rst_i, clken_1MHz, clken_1kHz, led : std_logic;
COMPONENT ECP5PLL IS
PORT(CLKI : IN std_logic;
CLKOP : OUT std_logic;
CLKOS : OUT std_logic
);
END COMPONENT ECP5PLL;
COMPONENT OSCG
GENERIC (
DIV : Integer := 128 );
PORT (
OSC : OUT std_logic := 'X' );
END COMPONENT;
COMPONENT powerup_rst IS
GENERIC(
rst_time : IN integer := 5000 --100ms
);
PORT(
clk_i : IN std_logic;
rst_i : IN std_logic;
force_rst : IN std_logic;
rst_o : OUT std_logic;
rst_n_o : OUT std_logic
);
END COMPONENT powerup_rst;
COMPONENT clockdivider_const
GENERIC(
div_value : integer;
reset_on_disable : boolean
);
PORT(
clk_i : IN std_logic;
rst_i : IN std_logic;
enable : IN std_logic;
clk_out_en : OUT std_logic;
clk_out : OUT std_logic
);
END COMPONENT clockdivider_const;
BEGIN
SOD(0) <= led;
SOD(1) <= '1';
SOD(2) <= '0';
SOD(3) <= '1';
SOD(4) <= '0';
SOD(5) <= '1';
SOD(6) <= ds(0);
SOD(7) <= '1';
SOD(9) <= '0';
SOD(10) <= '0';
SOD(11) <= '0';
SOD(12) <= '0';
SOD(13) <= '0';
SOD(14) <= '0';
oscillator : OSCG
GENERIC MAP (
DIV => 32 )
PORT MAP(
OSC => osc
);
ECP5PLL_inst : COMPONENT ECP5PLL
PORT MAP(
CLKI => osc,
CLKOP => clk_i,
CLKOS => clk_50m
);
SOD(15) <= clk_50m;
SOD(SOD'left downto 16) <= (OTHERS => '0');
-- Reset on power up
u1_powerup_rst_inst : powerup_rst
GENERIC MAP(
rst_time => 50
)
PORT MAP(
clk_i => clk_i,
rst_i => '0',
force_rst => '0',
rst_o => rst_i
);
FPGA_INT <= (OTHERS => '0');
CLKOUT <= clk_160m;
-- Clockdivider for 1MHz clock
u1_clockdivider_const_inst : clockdivider_const
GENERIC MAP(
reset_on_disable => true,
div_value => 160
)
PORT MAP(
clk_i => clk_i,
rst_i => rst_i,
enable => '1',
clk_out => OPEN,
clk_out_en => clken_1MHz
);
-- Clockdivider for 1kHz clock
u2_clockdivider_const_inst : clockdivider_const
GENERIC MAP(
reset_on_disable => true,
div_value => 1000
)
PORT MAP(
clk_i => clken_1MHz,
rst_i => rst_i,
enable => '1',
clk_out => OPEN,
clk_out_en => clken_1kHz
);
u3_clockdivider_const_inst : clockdivider_const
GENERIC MAP(
reset_on_disable => true,
div_value => 1000
)
PORT MAP(
clk_i => clk_i,
rst_i => rst_i,
enable => clken_1kHz,
clk_out => led,
clk_out_en => open
);
END ARCHITECTURE rtl;
But beside of the static assignments, nothing works
so SOD(0) that should be flickering with approximately 1Hz is just statically '0' so it seems that the oscillator doesn't work. I first tried to use the external 100MHz oscillator but that also didn't work. The PLL and the OSC component seem to be infered according to the build report
OSC 1/1 100% used
PLL 1/4 25% used
Another thing that puzzles me is the following message during synthesis
WARNING - I/O Port SOD[6] 's net has no driver and is unused.
But SOD[6]'s driver should be ds[0] which is assigned to the dip switch pin H2
This is the first time I'm using Diamond and the ECP5 and I don't know if I have to include something more in my project or if the usage of the library components is wrong. It's hard to find any reference for such a design.
Does anyone have an idea where I made a mistake or has some simple project laying around that compiles for the ECP5 Versa?