Well, you need some other things to make a counter out of
4 pure flip-flops, don't you?
So, you will find your input/output pads (IOBs), the combinational
logic in function generators (FGs), a clock buffer (GBUF or
equivalent), etc...
My opinion is that, albeit this is a bit funny to play with, you shouldn't
care about the floorplanner until you reach much higher levels
in the use of FPGAs. Xilinx autoroute will nicely take care of all this
if you give it at least some minimal constraints (Clock speed, IOB
signaling type and pad location mainly).
When you will implement designs with a fast clock and crammed
devices, you will go back to this.