Continue to Site

Welcome to

Welcome to our site! is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Is there any relationship between SNR and INL,DNL in ADC?

Not open for further replies.


Junior Member level 2
Oct 21, 2004
Reaction score
Trophy points
Activity points
inl dnl in adc

Dear all,
Is there any relationship between SNR and INL,DNL in ADC?

inl+dnl issues in adc

INL and DNL held close relationship

but SNR is ratio of input and output...

But the similarity is all of them is concern on the error of the quantization

dnl, adc

INL and DNL are closely dependant, and usually depends on device's matching. They are static parameters

SNR, depends on noise issues, and is a dynamic parameter (so it has no relationship with INL or DNL).

adc relation between sfdr and inl

rule of thumb: SFDR=20log(2^B/INL) for low input frequencies

DNL can degrade the SNR a few dB

snr adc issues

Yes, it is right that DNL and INL are static characteristics and SNR is dynamic one. Some times it expressed that INL = some of (DNL) while traversing from ICMR- to ICMR+ like a ramp input. These doesn't take care of frequency dependent errors. Thus static.

For SNR, the source of errors are many. As the name indicates it is ration of signal to noise power at the output of the ADC. But mind that the noise consists of variety of source. One of the major source is the quantisation noise. Thus, going by theory, for an Ideal ADC, SNR = 6.02N + 1.76 (dB).

Now, I don't agree with the above view that there is no relationship between INL/DNL and SNR. Because the DNL/INL is coming from quantisation error (may be shift of quantisation level, mismatch etc.). This certainly has to do with quantisation noise and thus SNR.

A second point coud be like this. If ENOb (calculated from SNR) of an ADC drops by , say, 2 bit from desired one; then the INL/DNL performance of the ADC is likely to be poor.

I would highly appreciate if any further clarification comes in this regard.

Not open for further replies.

Part and Inventory Search

Welcome to