Hi, I would like to know if the device intrinsic capacitance like Cgs bias-dependent or independent. Giving say, bias 400mV or 500mV (common source circuit with Vgs = 400mV or 500mV) for 65nm technology, is the Cgs the same or different and why?
Anything with a depletion region on either side of it will be
voltage dependent. MOS channels swing from accumulation
through depletion to inversion. Cgs follows gate voltage
directly; Cgd, only when the channel is well lit near the drain
(linear region - when it goes constant current the capacitance
is sort of stood off from the channel by the pinch. The
partitioning with drain voltage is a messy thing to get right.
The overlap capacitances are less voltage dependent, if
you do not have poly depletion anyway. Mostly fringing
fields through the various oxides. You can't meaningfully
deplete a >1E20 doped S/D region even if it wasn't silicided.
Agreeing with , Dominik Przyborowski, the s is the complex variable in Laplace domain. They are calculating the transfer function Id/Ig in Laplace domain for calculation of Transit frequency ft.
The “transit” or “cut-off” frequency, fT, is a measure of the intrinsic speed of a transistor, and is defined as the frequency where the current gain falls to 1.