DEV123
Member level 2
Hello Edaboard,
Please check if my explanation for PLL is right, if any mistakes please correct it.
PLL is a device which makes use of negative feedback so as to match the frequency and phase of a input signal avoiding noise and jitter in it to the ouput signal. So the output signal will have the same frequency and phase of input with no noise component and jitter etc. PLL contains a closed loop of Phase detector (mixer or multiplier) , loop filter (an LPf) and VCO and optionally frequency divider and amplifier etc.
using 565 pll to learn
---------------------
When the input frequency (starts from low frequency) is increased monotonically the pll outputs a free running frequency waveform which is independent of input. When the input frequency reaches a certain point (near to free running frequency f0) the PLL starts its control action (Point A). and the output gets locked till a frequency point in input is reached (point B). similarly in the reverse direction too 2 more points (C and D) as shown below.
fi (input frequency) -------------------------A----------------------------------------------B-----------------------------> forward input freq
<----D--------------------------------------------C---------------------------------------------------- reverse input freq
===================D------------------A-----------f0------------C--------------------B======================== frequency axis
difference AC is the capture and DB is the lock range f0 is the free running frequency.
out of DB the VCO gives out f0 itself.
-----------------
Is this explanation correct. Any thing to add here. Also while doing practicals for me f0 comes out of capture range, what to do?
while measuring f0 should I ground the input?
-Devanand T
Please check if my explanation for PLL is right, if any mistakes please correct it.
PLL is a device which makes use of negative feedback so as to match the frequency and phase of a input signal avoiding noise and jitter in it to the ouput signal. So the output signal will have the same frequency and phase of input with no noise component and jitter etc. PLL contains a closed loop of Phase detector (mixer or multiplier) , loop filter (an LPf) and VCO and optionally frequency divider and amplifier etc.
using 565 pll to learn
---------------------
When the input frequency (starts from low frequency) is increased monotonically the pll outputs a free running frequency waveform which is independent of input. When the input frequency reaches a certain point (near to free running frequency f0) the PLL starts its control action (Point A). and the output gets locked till a frequency point in input is reached (point B). similarly in the reverse direction too 2 more points (C and D) as shown below.
fi (input frequency) -------------------------A----------------------------------------------B-----------------------------> forward input freq
<----D--------------------------------------------C---------------------------------------------------- reverse input freq
===================D------------------A-----------f0------------C--------------------B======================== frequency axis
difference AC is the capture and DB is the lock range f0 is the free running frequency.
out of DB the VCO gives out f0 itself.
-----------------
Is this explanation correct. Any thing to add here. Also while doing practicals for me f0 comes out of capture range, what to do?
while measuring f0 should I ground the input?
-Devanand T
