Interview Question on Inverter

I have an interview question can anyone clearly explain wat happens with following two cases in CMOS invetrer

1 if positions of source and drain of both n and p mos devices are interchanged

2 nmos is replced by pmos and vice versa

could anyone clearly eloborate the operation

hi....
i m sending answer for the 2nd one..
it will work like a weak buffer......

And answer of first one is....

Interchanging the connection will not affect any thing....

when p and n are interchanged?

1.P -strong '1', weak '0' reason -not complete discharge of output capacitance load thereby weak '0'.(derived from vdd equations)
n - stron '0' , weak '1' reason - not complete charging of output capacitance load thereby weak '1'.

so when the positions are interchanged :
1.static loss increased : the inverter does not give a '0' output even if input is not driven,bcoz of conducting path between vdd and ground rails.Hence static losses even if 'off' condition.

2.noise margin decreases.

Added after 1 hours 23 minutes:

for source and drain interchange?
1. source should be biased at a fix voltage or ground to avoid body effect.which is variation of Vt(threshold) with V(source).thereby leading to loss of performance of nmos and pmos respectively.

2. from the inverter characteristics: the operation starts with pmos in linear region and nmos cut off.
|Vds|>Vgs-Vt and Vgs<Vt
both these equations are not satisfied.likewise the other operation points of inverter will be not satistied.

you can use this link for calculating the answers at exact point.
**broken link removed**.
thank you