interrupt in microcontrollers

[amitkr22]

I am going through microcontrollers interrupt.I am having a question.A microcontroller is having number of interrupt sources and all interrupt signal goes to cpu through system bus.Then how does a cpu decides that a particular interrupt has occurred. Please suggest.

 

[pradhan.rachit]

Please be more clear with your question.
What microcontroller are you referring to?

 

[betwixt]

In a system where interrupt signals pass through the bus (for example Z80, Intel 80xxx) there is normally an interrupt controller device sitting on the bus. The hardware interrupt goes to the controller which in turn passes an IRQ to the processor. To find out which interrupt created the request, the processor addresses the interrupt controller and asks it what the source was, sometimes also asking for all or part of the ISR routine address. That information is passed along the system data bus for the processor to use.

It isn't normally used in a microcontroller situation though (although it could be configured that way) because microcontrollers generally have a direct IRQ input. In that case the system buses are internal to the device and not part of the interrupt recognition per se.

Brian.

 

[eng_boody]

[amitkr22]
your question is not clear but I'll Tell you some about interrupts in general that may help you to focus and clarify your question,

--interrupts --> is occurrence of internal or external Signal which interrupts the execution of a program code it makes (by means of internal hardware architecture) the Program counter register value equal to the address of the corresponding Interrupt vector in the interrupt vector table
(each interrupt is associated with a a vector in the IVT). usually the the interrupt vector for each interrupt source is two small to place a whole code in it thus it's just a jump instruction to a block of code in the flash section .. this block of code is called the interrupt service routine , after the block is executed a return should be placed at the end of the ISR .. Return of interrupt is placed after the jump in the interrupt vector...note that a return from interrupt differs from ordinary return because
a return from interrupt place the old value of the program counter is replaced in it (popped from stack) so the the main program continue execution from the point it was interrupted .



--interrupts can be classified using two schemes : 1) software or hardware (internal or external)
2) interrupts with flags and those with no flags

1) - Software/internal interrupts --> it happens after the occurrence of internal event like:
-timer overflow -input compare match ...etc
- External/hardware interrupts --> it happens when an external event occurs,external event
could be be (a rising or falling edge or state high or lo on the corresponding physical pin)
the choice is done using a specified register that varies from one type of micro controller to
another.

all interrupt sources have a global enable bit which is common to all and each source have an individual enable bit ... some of the interrupts have a flag bit... note in the following the difference between enable bit and flag bit ....

when the interrupt happens the interrupt flag bit is set to one ...if the enable bit is enabled and the global enable bit is enabled the the program flow jumps to the corresponding vector then to the ISR after that jump the Global interrupt bit is automatically disabled which means during the execution of the current ISR if another interrupt happens it will not interrupt the current ISR that's because when the other interrupt happened only the corresponding flag bit is enabled but the global interrupt bit was automatically disabled which means no nested interrupts... when the current ISR ends and the program flow return to the main code AND THE GLOBAL INTERRUPT BIT IS AUTOMATICALLY RE ENABLED again the pending flag bit of the other interrupt cause it's execution .. after the excution of any interrupt withe the return from interrupt instruction the flag bit is cleared

-enabling nested interrupts --> that could be happened by enabling the global interrupt register by means of code in the first part of the ISR of the interrupt that needs to be interrupted further you can select which interrupts could do the nested interrupts by enabling the desired enable bits and disabling the unwanted then restor these registers at the end of that ISR...

2) not all interrupts have flags to give it the ability to pend ... so some can pend others couldn't and are forgotten after the effect or event causing the interrupts are canceled.



all the previous general concepts from the prespective of avr ... microcontrollers

I hope that could help you to focus now ....

if any member found any mistake in my answer .. of course he is free to correct or criticize

thanks

 

[Gorgon]

In addition to the things said above, many microprocessors has an inbuilt priority system for the different interrupts. This priority may also be programable to a certain degree.
Many of the smaller microprocessors have high priority nonmaskable interupts, normally one. This will always interrupt the microprocessor if the input is activated, and is not possible to disable in software.

There is also a difference between microprocessors and microcontrollers with several internal interrupt sources.

Common for all types of interrupts is the need for a dedicated interrupt service routine for each possible / enabled interrupt used / enabled in the system.