Interfacing with Microblaze

[yasser_shoukry]

microblaze gpio error

How can I interface a microblaze processor with any other hdl coded component on the same FPGA.

i.e I am using the EDK tool to design a Mciroblaze processor, then I want to interface it with another verilog coded module, then download both of them on the same Spartan-3E FPGA.

note, I already tried to create new module that has an instance of the microblaze_stub module and an instance of my module but the ISE fails to synthesize this design

Thanks and best Regards,
Yasser

 

[EDALIST]

you should rely more on your xps design.
use the wizard to connect your logic to microblaze opb bus.
another option is to maunaly create your microblaze core.

 

[yasser_shoukry]

I do not want to connect my logic to the bus, I want to connect it via a general purpose I/O module

 

[EDALIST]

just use the OPB_GPIO Core To Generate The I/O Port.

 

[yasser_shoukry]

Thanks EDALIST for your concern,

but, that's what i already did, but the ISE generates a lot of error messages telling that all the pins of the GPIO port is driving non-primritve parameters and other messages telling that all the nets that are connected to the GPIO are driven by multiple sources even with those nets that are inputs to my module

 

[EDALIST]

I Think Your Problem Is Ver Common When Interfacing XPS.

The GPIO Is bi-Directional Bus.

Thus GPIO Signal Is A Product Of OBUF Connected To

GPIO_I (in) , GPIO_T (r/w~), GPIO_O (out)

What You Realy Need Is To Connect This Signals Instead In XPS.

Best Regards.

 

[yasser_shoukry]

Thus GPIO Signal Is A Product Of OBUF Connected To

GPIO_I (in) , GPIO_T (r/w~), GPIO_O (out)

What You Realy Need Is To Connect This Signals Instead In XPS.

Could you clarify this statement??

note:I made the GPIO_I external , and it is what i am using to interface my module outputs to the microblaze, but still the same errors appears

Thanks in advance

 

[EDALIST]

YOU sHOULD cHECK tHAT yOUR xps IS A Sub - Module of your design.

All IBUF, OBUF Should be on yout top level design.