It is to do with your hierarchy, at this level the gate fingers of your PMOS and NMOS connect to metal and nothing else. However once this block is placed in a larger block 'IN' will be driven by something, ie pads, FET, resistor, etc, and this warning will disappear. It is often a good idea to put an antenna diode on the input (gate net) of logic cells as they are typically driven by long thin wires, and so the diode should cut down on Electrical rule check (ERC) errors.