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Integrator in AGC amplifier

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matin-kh

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hi every one,
in agc amplifiers for VGA we have: Gain(dB)=K1+K2*vctrl which vctrl is control voltage of VGA which is linear in dB with vctrl after the post amplifier and peak detector we have an integrator which its inputs are vpd(output of peak detector) and reference voltage and its output is control voltage of VGA I can't understand how the integrator generates the control voltage and how the output will be the value which we want? I mean I can't understand the relation between VGA and integrator.
could you please help me?
with best regards
Matin
 

AGC is not a simple linear Control System where you can assume optimum control by take the difference between the detected level and desired level and control the gain by hunting or integrating towards target until there is zero error difference.

The standard design method of any Control System feedback must consider a PID signal Conditioner including Proportional, Integral, and Derivative feedback. To determine if the control System is Stable, one uses Bode Plots or Root Locus with Nyquist stability criteria.

The Derivative feedback anticipates error improves speed, but adds noise, yet improves stability when limited, but has no DC for absolute error feedback. .

The proportional feedback is most common but has a error according to gain which can cause instability if too high or too low.

An partial Integrator feedback can be useful to hunt (slower) for the logarithmic level where the gain can be more precisely control with PI feedback , but Integration also causes lag, latency and overshoot, so the gain of each stage for P,I & D is determined to reach the optimal control system.

The word optimal must always be a measurable specification before starting the design process and verified after. Specs such as % overshoot to a certain step size and a response time requirement are minimum. Many other specs can be added defined as well for time, non-linear direction amplitude or phase/frequency domain depending on the application.

For some AGC solutions you want fast capture or attack to reach desired gain and then slow decay or response in case of drop outs. This requires some non-linear control to the non-linear gain. e.g. diode + resistor + capacitor peak & hold with slow decay, or a gain that is variable and the feedback is slower or reduced when the signal is more uncertain or lower SNR which may use dual bandwidth approach such as dual gain for capture then track slower. plus many more variations.

Depending on the channel characteristics for signal and noise, the AGC might have to contend with dropouts and Noise spikes so a filtered AGC must try to block these disturbances.

YOu can imagine an Audio and video AGC would have much different specs to a Heart rate monitor.
 
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I can't understand how the integrator generates the control voltage and how the output will be the value which we want? I mean I can't understand the relation between VGA and integrator.

As the most simple answer to your question: The integrator is able to "hold" the control voltage at the required level if it is equal to the specified value. In this case, no additional error signal is produced and the intergator does not change its output voltage.
 
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The standard design method of any Control System feedback must consider a PID signal Conditioner including Proportional, Integral, and Derivative feedback. To determine if the control System is Stable, one uses Bode Plots or Root Locus with Nyquist stability criteria.
Thank you very much :) I have forgotten the PID controllers so I couldn't find a relation between integrator and control voltage until you tell me about it. I studied about PID controllers in my BS degree and I can remember a brief about it I searched but I can't remember how PID controllers can make the error zero. could you please explain me about it?
 

I explained already..

take the difference between the detected level and desired level and control the gain by hunting or integrating towards target until there is zero error difference.

Do you need to refresh your memory on integrators? With a fixed offset there will be a ramp out to control until offset is null, then the ramp stops.
 
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