as i understand it,
clock latency is the combination of source latency and network latency which is basically the amount of time it takes for the clock signal to reach the clock sink from the clock generation point. but the term latency is applied before the clock tree has been built and we are at the "ideal" stage wherein we need to apply these latency values to the design because the tool cant calculate the delays in the absence of a clock tree.
insertion delay is the same delay mentioned above, but now the clock tree has been built and we can propagate the actual delays.
so basically, the difference is that the latency values are ideal values that we give befire CTS and insertion delay is the actual values that is propagated after CTS.