deepakchikane
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Dear all
i am trying to design a inrush current limiting circuits with the help of triac (gate triggering will be after 100ms)
Conditions:
1)the NTC will in parallel with the triacs terminals.
2)during turn on-ac current will be pass through the ntc which will limit currents for 100ms & after that from control i will trigger the triacs..
n rest current will be passing through triacs which cools down the ntc (to avoid damaging)
I dont have any circuits to post, i am just planning to do by above conditions (it is just a idea)
can anyone provide me guidance how to design except moc driver (it leads costing higher projects)
Thanks
Deepak chikne
i am trying to design a inrush current limiting circuits with the help of triac (gate triggering will be after 100ms)
Conditions:
1)the NTC will in parallel with the triacs terminals.
2)during turn on-ac current will be pass through the ntc which will limit currents for 100ms & after that from control i will trigger the triacs..
n rest current will be passing through triacs which cools down the ntc (to avoid damaging)
I dont have any circuits to post, i am just planning to do by above conditions (it is just a idea)
can anyone provide me guidance how to design except moc driver (it leads costing higher projects)
Thanks
Deepak chikne