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Input and output matching in Distributed amplifier

circuitking

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Input and output impedance matching in Distributed amplifier

Hi, I am designing a distributed power amplifier. I am a bit puzzled as how to do input and output impedance matching in distributed amplifiers. I would like to know whether the matching network design procedure is in any way different from as that of basic CS amplfier. Please suggest any detailed book on the distributed amplifiers. Thanks
 

avadak

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Dear circuitking,
the design of a distriubted amplifier is quite different from the traditional CS amplifier. It comprises several mosfests (3-5) connected with two transmission lines: one for the gate and one for the drain. In IC design these lines are realized with a cascade of LC cell. For further details you can see this article on the design of a distributed amplifier for UWB communications https://link.springer.com/article/10.1007/s10470-016-0889-8 or the book Broadband Microwave amplifiers by Virdee. https://books.google.it/books/about/Broadband_Microwave_Amplifiers.html?id=awLC616gPsMC&redir_esc=y

I hope it is useful

Regards
 

circuitking

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Your reply was useful. I read the book a bit today. i understood that they are forming T network (inductors) including output impedance of gain stage.
In IC design these lines are realized with a cascade of LC cell
what about using transmission line itself in place of inductors.
 

FvM

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Transmission line can be considered as the idealized case , however the citation refers to IC design, there you'll have difficulties to implement transmission lines with required electrical length.
 

circuitking

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Dear circuitking,
the design of a distriubted amplifier is quite different from the traditional CS amplifier.
Thanks for the documents. I read the paper but couldn't grasp much I ll have to read again.

But This is what I think, for the drain line, first I found out the output capacitance of the gain stage. Then Z=sqrt(L/C), in this I plugged in the characteristic impedance I want to achieve. Next, I calculated the Inductor value from the formula. Lastly, I split the inductor into two half value inductors and form a T-Network.

I do to the same for gate line also by finding the input capacitance of the gain stage. Does it make sense or did I ignore something?
 

avadak

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Dear circuitking,
your procedure is correct, but the synchronism condition must be take in account. To guarantee the same time constant on the drain and the gate lines LgCg = LdCd. In traditional MOS Cg > Cd, so a further capacitance is added on the drain line.

N.B. the gate capacitance Cg must be chosen to garantee the desired amplifier bandwidth (Bw = (1/pi)*sqrt(1/(LgCg)))

I hope that it is useful

Regards
 

circuitking

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Dear circuitking,
your procedure is correct, but the synchronism condition must be take in account. To guarantee the same time constant on the drain and the gate lines LgCg = LdCd. In traditional MOS Cg > Cd, so a further capacitance is added on the drain line.

N.B. the gate capacitance Cg must be chosen to garantee the desired amplifier bandwidth (Bw = (1/pi)*sqrt(1/(LgCg)))

I hope that it is useful

Regards
Fantastic, this helps a lot. Now to extend this to transmission lines, Can I find a transmission line equivalent to inductor value I found in post #5 and replace it.
(When the length of the short circuited line is < lamda/4, input impedance of the line Zin = jZ0*tan(Bl) or for the length of the open circuited line, lamda/4<l<lamda/2 ).

is that going to be enough? Thanks.
 

avadak

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Yes theoretically you can substitute the inductor with the transmission line but, as explained in post #4, in IC design the trace lengths are too small to implement the transmission lines at low frequencies. In my experience I've used the IHP process with a channel length of 130 nm that allows to implement the transmission lines but for project with a frequency of 100 GHz. Hence, the use of the inductor is mandatory for low frequencies. The transmission lines could be implement if you are designing a distributed amplifier with discrete components but you must take care about the variation of the threshold voltage of the transistor stated in datasheet. To work properly, with discrete components, the transistors in each cell must exhibit the same Vth.

Regards
 

circuitking

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Yes theoretically you can substitute the inductor with the transmission line but, as explained in post #4, in IC design the trace lengths are too small to implement the transmission lines at low frequencies.
In my case I have frequency from 4 GHz to 50 GHz.

Hence, the use of the inductor is mandatory for low frequencies.
What do designers consider when they have both low frequencies and High frequencies in their operating range. I think they just have to stick to one (either inductor or transmission line ) and deal with it.

The transmission lines could be implementd if you are designing a distributed amplifier with discrete components but you must take care about the variation of the threshold voltage of the transistor stated in datasheet. To work properly, with discrete components, the transistors in each cell must exhibit the same Vth.
I don't think I understood this correctly. "With discrete components" means it is not IC process right? I didn't know that discrete transmission lines also available.
 

circuitking

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"With discrete components" means it is not IC process right?
Just to add to your comments. I found this while reading a document.
"IC design techniques have been invented that rely heavily on matched device
characteristics and resistor ratios rather than absolute parameter values. The circuits described
in this chapter depend, for proper operation, on the tight device matching that can be realized
through IC fabrication processes, and many will not operate correctly if built with mismatched
discrete components. However, many of these circuits can be used in discrete circuit design if
integrated transistor arrays are used in the implementation."

https://www.slideshare.net/mujju433/current-mirrors-very-good-pdf?from_action=save
 

avadak

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Dear circuitking,
with discrete component I indicated the off-chip components (the SMD components). In your case I suggest to design an inductor. Even with 50 GHz the wavelength is too big for IC design. Moreover, to enhance the gain and noise performance try with a cascode configuration for the MOS stage.
I hope that it is useful

Regards
 

biff44

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i am not an expert at IC design...but i would look at EACH element of the active device, look at what resistive impedance the input and output want to be at, then choose an input transmission line of that impedance, and the output transmission line of the other impedance. I would do some small quasi lumped matching at the input and output of EACH DEVICE to try to remove the reactive part of its impedance. After that....the theory of small reflections is your friend.
 

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