Inout port connection in sub module

[arjun1nh07]

I have ram design in that design one sub module as inout port.
I have used continuous assignment statement to assign input and output to that inout port

assign d1=(WR1 && !RD1 && (!SF && !AF))?din:0;
assign d2=(WR2 &&!RD2 &&(!SF && !AF))?din:0;
assign d3=(WR3 &&!RD3 &&(!SF && !AF))?din:0;
assign d4=(WR4 &&!RD4 &&(!SF && !AF))?din:0;
this is for input
assign din=(MEM_RD1)?d1MEM_RD2)?d2MEM_RD3)?d3MEM_RD4)?d4:din;
this for output

I am getting only x as my input and output not able to retrive or send value to that port.
I have even tried connecting inout port in top module
If possible please help me friends

 

[std_match]

You must always turn off one direction by assigning 'z'.

If you are designing real hardware I suggest that you don't use inout.
Use separate ports for input and output.

For FPGA, inout is OK for pins.

For ASIC, you probably don't use inout in the design. Bidirectional pins are created by using I/O cells.