Thanks a lot for the reply. I will surely check out for setting different clock modes in Innovus.
However, just out of curiosity, I would like to know the hold issues that you have mentioned, are likely to occur.
Say, I've set the clock freq to the highest possible value and then done the STA. Innovus will meet the timing constrains(setup, hold etc.) for that frequency across different corners(worst, best etc.). This way, I will be sure that when the circuit is working in ff corner or ss corner, there are no timing violations in the fastest freq. Now say the freq has changed and moved to a lower value. Clearly, there will be no setup violations. Now I would like to ask how would you picture the hold violation in this case?
To summarize, setup time, hold time is the property of the DFFs and related to the clock edge as far as I know. So if the different freqs have same risetime-falltime, aren't they(setup-hold time of the flops) supposed to be the same? Could you please suggest me what I am thinking wrong here?
If you kindly give us a scenario, it will be really great. Thank you once again