Re: ARM processor
The most notable features of the ARM instruction set are:
• The load-store architecture;
• 3-address data processing instructions (that is, the two source operand registers
and the result register are all independently specified);
• conditional execution of every instruction;
• the inclusion of very powerful load and store multiple register instructions;
• the ability to perform a general shift operation and a general ALU operation in a
single instruction that executes in a single clock cycle;
• open instruction set extension through the coprocessor instruction set, including
adding new registers and data types to the programmer's model;
• a very dense 16-bit compressed representation of the instruction set in the Thumb
architecture.
To those readers familiar with modern RISC instruction sets, the ARM instruction
set may appear to have rather more formats than other commercial RISC processors.
While this is certainly the case and it does lead to more complex instruction decoding,
it also leads to higher code density. For the small embedded systems that most ARM
processors are used in, this code density advantage outweighs the small performance
penalty incurred by the decode complexity. Thumb code extends this advantage to
give ARM better code density than most CISC processors