Hello every one
Could you please explain for me a little about hardware replication in FPGA? I prepared an ASM (Algorithmic State Machine) and want to reduce it. I found that one way is "hardware replication", but I need more info about it. If you know about it please help me by some practical examples (circuit and VHDL code).
Regards
Mostafa.
Hi
I know how to use them to replicate the components, but I want to know that how does it lead to reduce an ASM? In fact by this Technique I want to reduce an ASM and determine operations which are allowed to be run concurrently.( in hardware version)
Regards
Mostafa
"hardware replication" technics is used by synthesis tools to get higher operating frequency, the tool replicates a piece of logic
with high fan-out to reduce number of driven gates and to make source-sink connections shorter.
If this is your case - you should switch off this option in your tool if your goal is gates count reduction;