Why do you use outdated "LS" type logic? they draw a lot of input current. --> use "HC" type instead.when loaded by an external 74LS74
Isn´t useful for logic inputs. You may use it for DC decoupled HF circuits.3.5Vpp
Hi,
Do you mean "microcontroller"?
--> They usually have built in oscillator circuit.
* some have built in RC oscillators --> they don´t need external parts
* some have built in RC oscillators --> with external parts you may determine clock frequency
* some have built in XTAL oscillators --> they usually just need 2 external Cs and one external XTAL
"Less components" and "discrete circuit" are contradictorily somehow.
Why do you use outdated "LS" type logic? they draw a lot of input current. --> use "HC" type instead.
Isn´t useful for logic inputs. You may use it for DC decoupled HF circuits.
But logic circuits need absolute values: like <0.7V for LOW and >2.0V for HIGH (example).
****
Without the information about your voltage levels.. hard to say.
* a comparator should work.
* or a FET as buffer
Confusing to me: you say you "want to build" but on the other hand there seems to be an existing circuit.
Klaus
It won't work - the circuit uses C9/R2 to create a short 'spike' to clock the '165. It isn't the voltage levels that matter, it is the speed the edges rise and fall.
I haven't checked but if there is a spare logic gate in there somewhere, you could use it to 'square up' your existing clock generator.
[edit - there should also be a diode, cathode to +5V across R21 and I'm not sure the 'ear' and 'mic' aren't crossed over]
[even more edit - they refer the socket markings on the cassette recorder the connections go to.]
Brian.
I would doubt that solution would work - the diodes may well stop the oscillator running and in any case would clip the amplitude to ~0.5V when it still has to be more than about 3V to guarantee clocking the LS165. The original design uses logic gates to produce and buffer the clock specifically to ensure fast logic level edges.Maybe a simple germanium anti-parallel diodes shunted to the GND at the output of the oscillator could help squaring the signal up, I will test this.
Are R4 to R11 really 1K? I can see why a resistor is needed, it is due to the horrible way of forcing the data bus low to make the Z80 execute NOP instructions but the value seems inordinately high, even for the slow data speed. I would have thought 47 Ohms more than adequate.
Brian.
Diode clipping just removes the top and/or bottom of the waveform, it doesn't increase the rise or fall time of the waveform. Your problem is simply that the waveform should be TTL level with fast rise and fall edges, you will never get that directly from a single transistor oscillator even if it is followed by an analog buffer stage. I think as you will need to produce logic levels, it is probably easiest to abandon your existing plan and go back to the original design. You will end up with something far more complicated following your present policy.
Brian.
They won't work better than the original. The 'seekic' and 'circuitswiring' designs will probably work but you would have to remove C4. I don't think the other circuits stand much chance. Basically, you want a square wave with fast edges and that's exactly what a logic gate solution will do. Your other option is a ready built oscillator module but the 6.5MHz frequency isn't standard so you might have trouble finding one. The frequency has to be exact or the video and audio will not work.
Brian.
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