I do not understand "The circuit on the right is a feedback amplifier with loop gain T. Since all time constants in that loop are of the same order of magnitude, they create a system with several poles"
Could anyone point me to some maths reference / equations ? Razavi book does not mention about the circuit on the right though.
Thanks. Let me start with 3T Wilson mirror in BJT implementation.
A feedback path is thus formed that regulates IC3 so that it is nearly equal to the input current, reducing the systematic gain error caused by finite βF.
if you use a simple bipolar current mirror, the output current is smaller than the input current because the base currents are subtracted from the input current to generate input bias currents for the 2 transistors. The sys gain error is 1-Iout/Iin, and if you can reduce the base currents the gain error will decrease. You can reduce the base currents by increasing the BF, but for bipolar devices it is finite. And gain error will also occur by the Early effect. At this circuit the explanation is similar, but more complicated because of the feedback.
For the loop gain T, you can image that from the drain node of M3, the impedance is 1/gm3 +
Rin=ro1+ 1/gm3.
For M1, from its gate to its drain, the gain is gm1*ro1, which is aproximately gm1*Rin. Also, from the drain of M1 to the gate of M3, to the source of M4, the gain is 1, so the total loop gain T is around gm1*Rin.
a) Why is the gain from the drain of M1 to the drain of M3 = 1 ?
b) In most CMOS applications, the use of resistive source degeneration to reduce noise and improve matching is restricted due to headroom constraints. Could anyone elaborate on this statement extracted from "Ultra High-Compliance CMOS Current Mirrors for Low Voltage Charge Pumps and References" ?