Implementing (64K x 1-Bit)ram on Xilinx Virtex-II Pro

[tarek1984]

need help Implementing (64K x 1-Bit)ram on Xilinx Virtex-II Pro

Dear all

I am trying to implement a (64K x 1-Bit)ram on a Virtex-II Pro

I am using ISE 10.1 and every time I use the Memory Generator
The "Synthesis" completed successfully

I get this error NgdBuild:605 - logical root block 'ram64800x1' with type 'ram64800x1' is unexpanded. Symbol

Can anyone help me in the Verilog code of the ram

 

[tarek1984]

hello any help

 

[tarek1984]

waiting for help:sad:

 

[tarek1984]

hi .