Implementation of FINFETS in Hspice

[anne rachel]

Can anyone give me a suggestion as to how to write a netlist for FINFETS in Hspice?
I have searched but couldn't get a proper example for the same..I am quite new to FINFETS technology.





Thanks in advance

 

[erikl]

This posting should help you to go on.

 

[Zankrut]

Get the Model file from the ptm.asu.edu, and in that they've given the code in the sub circuit part. Modify as you want to. It'll run. See this example :
vvdd nvdd 0 1
vg1 vg1 0 PULSE 0 1 2490p 10p 10p 2490p 5n
vg2 vg2 0 PULSE 0 1 2490p 10p 10p 2490p 5n

X1 nd vg1 vg1 nvdd DGPMOS
X2 nd vg2 vg2 nvdd DGPMOS

X3 nd vg1 vg1 3 DGNMOS
X4 3 vg2 vg2 0 DGNMOS
*Cload nd 0 10.24fF
.options captab post
.print dc cap(nd)

.Measure avg_pw AVG POWER FROM=2ns to 8ns
.Measure Tran TR TRIG V(vg1) val='0.5*1' RISE=1 TARG V(nd) val='0.5*1' FALL=1
.Measure Tran TF TRIG V(vg1) val='0.5*1' FALL=1 TARG V(nd) val='0.5*1' RISE=1
*.Measure Tran TR1 TRIG V(vg2) val='0.5*1' RISE=1 TARG V(nd) val='0.5*1' FALL=1
*.Measure Tran TF1 TRIG V(vg2) val='0.5*1' FALL=1 TARG V(nd) val='0.5*1' RISE=1
.tran 1n 8n
.print i3(X4.mn1)
.end


this is the NAND2 gate with Short Gate configuration. hope this would have helped you..