implement MIPS instructions with verilog

[mostafa272]

Hi

I need a implementation datapath and controller for MIPS instructions(R-type and I-type instructions) in single cycle with verilog code,can u help me ?

 

[bigdogguru]

Hi,

Check out OpenCores they have several open source ips including MIPS soft cores, many are in verilog.

Hope this info helps your endeavor!

 

[mostafa272]

thanks,but i couldn't find what i need,i need code for single cycle datapath ,no pipeline with 5 stages.

 

[bigdogguru]

I didn't expect you to find an exact match for what you seek. A specific requirement set, like you have, is going to require you to roll-your-own. You still should be able to learn and use parts of the code available on OpenCores.

I did find some additional sources:




Tiger "MIPS" Processor

But I doubt any soft core out there meets your criteria exactly.

Good Luck

 

[nhn22]

Hi

I need a implementation datapath and controller for MIPS instructions(R-type and I-type instructions) in single cycle with verilog code,can u help me ?

excuse me,did you find what you wanted?if you did,is it possible to send it for me?