The broad plan is to transfer a bit map from PC to the board through the PCIe interface and onto the RAM on the board,
the image gets processed on the board and is returned to the PC after processing again as a bit map.
No, Qsys PCI Express design was of little help, since I only have the web edition of Quartus II.
I could get a ready core "Xillybus Core" from Eli Billauer's blog at
This core was sufficient for my requirements.
I did aproach the author to enhance the address lines in the core, to which he kindly obliged.
So now I can transfer upto 2MB of data to the FPGA memory and back.
This core was sufficient for my requirements.
I did aproach the author to enhance the address lines in the core, to which he kindly obliged.
So now I can transfer upto 2MB of data to the FPGA memory and back.
It is a neat implementation. worth having a look.