The IBIS Algorithmic Modeling Interface (IBIS-AMI) is a modeling standard for SerDes PHYs that enables fast, accurate, statistically significant simulation of multi-gigabit serial links. IBIS-AMI was developed by a consortium of EDA, Semiconductor and Systems companies and was approved as part of the IBIS 5.0 Specification in August 2008.
Before IBIS-AMI, systems designers faced significant limitations when performing serial link simulations:
* Traditional SPICE-based analysis is slow and can't simulate the millions of bits needed to accurately predict link operating margins
* Open-source statistical analysis tools simulated many millions of bits but couldn't accurately model a specific semiconductor vendor's device IP
* Proprietary semiconductor vendor tools accurately model vendor IP and simulate millions of bits, but can't be used when different semiconductor vendors are used at each end of the link
The IBIS-AMI specification was developed with the following specific goals:
* (Interoperability) Models from different semiconductor vendors work together
* (Transportability) The same model runs in different IBIS-AMI simulators
* (Performance) 10 million bit simulations run in 10 minutes or less
* (Flexibility) Models support both Statistical and Time-Domain simulation
* (Usability) Models expose control parameters users can set for simulation
* (IP Protection) Models cannot be reverse-engineered, semiconductor vendors control which details are exposed to the user.
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