I use quartus2. How Can I use "MAXPLUS2" package ?

[k1gunner]

Hello

I'm begginer for quartus2.
When I try using maxplus2 package(\quartus50\libraries\vhdl\altera\maxplus2.vhd) on Quartus2 program, always error happens.

Error: Node instance "com1" instantiates undefined entity "a_16cudslr"

I already set lmf file to maxplus2.lmf
(Assignments->Setting->Analysis & Synthesis Setting -> VHDL Input)
however, it doesn't seem to link package. I don't know why.
Who do you know about this happening?

this is my short source code and error message.

-----------------------------------
library altera;
use altera.maxplus2.all;
library ieee;
use ieee.std_logic_1164.all;

entity test_counter is
port(
clk_c : in std_logic;
clrn_c : in std_logic;
setn_c : in std_logic;
data_c : in std_logic;
stct_c : in std_logic;
dnup_c : in std_logic;
ltrt_c : in std_logic;
q_c : out std_logic_vector (16 downto 1)
);
end test_counter;

architecture main of test_counter is
begin
comp1 : a_16cudslr port map (clk_c,clrn_c,setn_c,data_c,stct_c,dnup_c,ltrt_c,q_c);
end main;




~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 5.0 Build 168 06/22/2005 Service Pack 1.04 SJ Full Version
Info: Processing started: Fri Sep 30 02:52:31 2005
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off test_counter -c test_counter
Info: Found 2 design units, including 1 entities, in source file test_counter.vhd
Info: Found design unit 1: test_counter-main
Info: Found entity 1: test_counter
Info: Elaborating entity "test_counter" for the top level hierarchy
Error: Node instance "comp1" instantiates undefined entity "a_16cudslr"
Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warnings
Error: Processing ended: Fri Sep 30 02:52:32 2005
Error: Elapsed time: 00:00:02
Error: Quartus II Full Compilation was unsuccessful. 1 error, 0 warnings