I have this error on cadence , any help ?

[hoo]

I have this error on cadence , any help ?

 

[yadavvlsi]

You would like to redefine a parameter which is already defined in your model file or PDK. You add this parameter to 'Design Variables' pane in Analog Design Environment window. When you run the simulation, you get an error message similar to the one above. Does Spectre allow duplicate parameter redefinition?

Spectre allows parameters redefinition. The "redefinedparams" option lets you do this.

Default for this is "error". To change to "ignore" or "warning, in the latest ISR of the IC tools, do the following:

In ADE, click on Simulation->Options->Analog.

In IC 5141, scroll down midway to see "redefinedparams"
In IC 614 and 615, select the "Check" tab to see "redefinedparams"

Note: ADE netlists in this order:

Design Variables
include files

The last parameters statement in the netlist is used by spectre in simulation. If you want to use an ADE design variable to override an include file parameters statement, you need to use IC 615ISR3 or later. In this version, you can set this .cdsenv variable:

envSetVal("spectre.envOpts" "netlistModelFileFirst" 'boolean t)



This will make ADE netlist in this order:
include files
Design Variables

redefinedparms has 3 options:

redefinedparams=error -- Error message which halts the simulation (default)
redefinedparams=warning -- Warning message only
redefinedparams=ignore -- Spectre silently supports it.

Reference: Cadence support

 

[hoo]

Thanks alot .
I have another question .... I am working on TDC and I want input signal which is (LOW) and after few seconds becomes (HIGH) then still (HIgh), How can I get this on cadence ?

 

[se7ensong]

Check "vpulse" in the analogLib. Just put the pulse period longer than your simulation time.

 

[sarge]

...or just use vpwl source