Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

i don't fully understand prescaler

Status
Not open for further replies.

firewind

Member level 1
Joined
Jun 7, 2005
Messages
36
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Location
Milky Way
Activity points
1,535
sorry, I know it's a simple logic. A prescaler is a frequency divider that is used in synthesizer but according to:

https://www.answers.com/topic/dual-modulus-prescaler

explanation, I'm still not clear what is the purpose of having a moduli? T. Lee explanation is too complicated. I can't make out to what in the world is he talking about. lol. Could someone please explain to me? Then also, in every frequency synthesizer, there is a PLL. Why do we need to use a PLL? That is phase tracking but we're creating frequencies here. And why do we need to synthesize frequency, in what application do we need it? thanks
 

Hello firewind,

You can appreciate much this prescaler thing when you are developing microprocessor applications.

Let me share my thoughts on your queries.

1.) Moduli - in my understanding it is the factor how much you scale your frequency. Example:

input frequency = 4MHz
modulos = 2 that is 2^2 then
output frequency = 1 Mhz.

Input frequency is divided by the 2 raise to the modulus.

2.) PLL. Well I dont fully understand this either. you can google this.

3.) One application of prescalers is timing generation for microcontroller and microprocessor applications. Most processing devices runs fast. So to generate mseconds timing or seconds timing you need to prescale teh inout system clock and have some coding to get the desired timing.
 

Why use a PLL may require multiple answer ...
The main reason I can give you is:
-As high is the freq you want, the less is the accuracy you get and the higher the noise on that frequency ...
-So you can have 2 clock, 1 very good at low freq and 1 not good at your high freq
-You can prescale the high freq clock and then use the resulting freq in a pll that use as reference the low freq good clock to generate the controlling voltage for your high freq clock getting a much better quality.

Hope this help,
Max
 

firewind said:
sorry, I know it's a simple logic. A prescaler is a frequency divider that is used in synthesizer but according to:

https://www.answers.com/topic/dual-modulus-prescaler

explanation, I'm still not clear what is the purpose of having a moduli? T. Lee explanation is too complicated. I can't make out to what in the world is he talking about. lol. Could someone please explain to me? Then also, in every frequency synthesizer, there is a PLL. Why do we need to use a PLL? That is phase tracking but we're creating frequencies here. And why do we need to synthesize frequency, in what application do we need it? thanks

There are two core purposes of PLL
1. A PLL provides you a stabilized frequency reference
2. It may be used to provide a multiple of an input frequency (off course with 1. as the benefit).
 

thanks guy, I understand why we need a pll now. We need it so we can match up the phase of the newly generated frequency to that input reference frequency.

now, why couldn't we just divide the frequency but instead we need a moduli frequency divider so we can select different kind of divider based on the mod of 1 or 0?

What is the purpose for dividing frequency? Why couldn't we just use a mixer to downconvert the signal instead of dividing?

And how exactly does divided frequency related to that so call "channel spacing"? Because all I'm seeing is after I divide an incoming microwave frequency at 10GHz by 100 down to 100Mhz, I only have 1 channel then but how come RF people keep talking "channel spacing", where does it comes from?

thanks
 

PLL is simpleused to maintain the phase locked to the required frequencey.It will not allow the Receiver to deviate from is frequence of interest
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top