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HSPICE output file question

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Junior Member level 3
Jul 2, 2007
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hspice output

Hello, everyone,

I have a question . As we know , hspice output file can give us lots of useful information about the circuit behaviour. For example, we can know the MOS transistor is in saturation region, or linear ,or cut-off. And we know every transistor's Gm, Gds, Ids, Vth, Gdsat and so on. Therefore, we can judge whether our circuit is in right state.

However, in discrete circuits like switched capacitor filter, to what extent do we trust the information given by the output file. The transistors as switch are shown either cut-off or linear , as a result, the transistors in OPAMP are shown different state. They are possibly in saturation , linear or cut-off as well.

Here is my question, if the critical transistor like the input transistor of OPAMP (which is connected with switch) is shown cutoff state in the output file after Hspice simulation , which choice should I make ? My OPAMP design goes wrong or it is a possibility to occur? PS: my opamp works well in all corner case in continuous circuits.

I hope I get my question clear and wish for more comments .

By the way, in a transient simulation, at which time point do the output file show ?
I works in Analog Design Environment in Cadence. (I know the Hspice in PC can indicate which time point to output, but how to do it in ADE , it only support schematic input , nor netlist input)


hspice output

I have ever seen this before and I found that when a very small current flow through a big mosfet then Hspice will show it cut off. I don't know is that right in Hspice.

how to change hspice output file

If VGS is less than VT, Hspice will write "cut-off".
in this state, the input transistors are not in saturation and cutt-off. they are in sub-threshold region.
As I know, the input transistor must be in saturation region for a good OPAMP design.

Hi, let me get my question more clear.

Hspice in windows OS can print all the DC states of transistors at the specified time point by using the command '.OP'

But Hspice embedded in cadence environment (Analog Design Environment) seems not to support to perform this function. So we can do nothing about the output file but accept what it tells us. Is there anyway we can change this situation and get the output file in our own control ?

Added after 5 hours 46 minutes:

Now I got the answer of my own question, which proves that my worry was totally unnecessary. Because the Hspice output log has listed both of the two state of switched capcacitor circuits: when switch is on or off. I just read the state report when switch is off ,while neglected the state when switch is on, which just follows the former state . So there is no problem now :D

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