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POR design usually incorporates a specification to glitch.
It would be designed to respond to a glitches greater than certain duration.
Their are papers on POR uploaded in IEEE study papers.
You could search for that.
also, please make sure your POR is durable to voltage steps that are not into the POR region. I've seen some capacitive POR circuits that either didn't work because they expected a fast rising input and got a slow rising input, or falsely triggered when the input stepped from 2v to 5v when the trip point was 1.8v.
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