[SOLVED] how to write the second argument of $fsdbDumpvars() in verilog & VHDL mixed project

[dzkxybx]

how to write the second argument of $fsdbDumpvars() in verilog & VHDL mixed project

hi,
my project is verilog and VHDL mixed. top module and testbench are verilog, and all submodule is VHDL.

now i want to dump fsdb file only for certain submodule, not for the whole hierarchy.

i know if the project verilog only. i can use task like this:

        $fsdbDumpvars(0,tb.top.submodule1.signal1);

but how to write this task, when VHDL is mixed in?

thanks !