how to write data of the bus in a text file using verilog

[pankaj jha]

Hi all,
I am running a AMS simulation in Cadence virtuoso. My output from a block (in verilog code) is a bus of 19 bits.
I want to write a verilogA code to write the bus data (at every negative edge of clock) in a text file.

Can anyone help me with the code???

 

[longtv8]

Hi Pankaj jha.

i hope this is code you need

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Code Verilog - [expand]
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integer file_open;
initial begin
      // Open file 
      file_open = $fopen("bus19.txt", "w");
end
 
always @(negedge clk) begin 
    if(flag_latch_bus_out)
        $fwrite(file_open, "%h\n",bus_name);// bus_name: you want to get values.// %h you want to write bus data is hex / %d : decimal
end

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