hi aji_vlsi:thank you very much!
i have find $VERA_HOME,but when i find it ,i feel they are very difficult ,the easiest one is pci,and when i see its readme ,it's compile step make me confused.
at first ,i want to write a verilog programe and use openvera to verificate it ,but when compile it ,it create a .vr file,from then on ,i don't kown what can i write into .vr file.and then ,i see the examples,they are vip,they are so different from a simple program write by openvera. these are my understand, there are a lot of errors,please point out!
you say:
Why don't you call local SNPS support? They should help you with use model issues, forums like these will be for specific doubts IMHO.
but in my city ,there is no local SNPS support,this is a really problem
,and there is no one kowns openvera around me ,
you help me so much ,i really feel very inspired!thank you so much!
Added after 1 hours 1 minutes:
at present ,i use vera, an chinese friend told me i should install vcs ,if i want to use vip i should install designware also