how to use systemc in fpga design flow

[umairsiddiqui]

how to use systemc in fpga design flow, (any example project..., book)
i am asking about systemC (specC), as (some) tools for systemC are available for free as compared with e or openvera.

also how to setup systemc for fpga flow... for painless design and verification????

 

[omara007]

SystemC has a synthesizable subset can be called RTL SystemC .. you can use a tool called (sc2v) to translate this RTL to verilog which can be synthesized to FPGA. Another thing, is that if the FPGA includes any processor core like (microblaze), SystemC can be used as normal C++ for programming this core if u have the proper compiler.

An example of complete system design using SystemC is avaiable on opencores. The guys used (sc2v) free tool to convert their systemc to synthesizable verilog.

About the tools, if you use Linux the best thing is to build the downloadable SystemC libraries on GCC. then just compile systemc as simple as compiling C++.

If you are using Windows, you can do the same on Cygwin, or use MS VC++ 6.0.

 

[ux]

you can read about systemc in the "a systemc primer" book by J.Bhasker
you can find this book in the ebooks upload/download section of this forum

 

[tux]

U can check out xilinx site it has lot of application notes

 

[alchemist59]

hi

I used Active -HDL 6.3 to simulate device in SystemC on behavioral level - great tool.
but i'd like to ask what compiler or tool may be used to dip the project into FPGA?
Are any free tools working in Windows?