How to use module instances in always block

[Muthuraja.M]

Hi friends ,

I want to call the dff module from always block

But it shows an error like undefined veriable..

Pls rectify my problem...

Thanks in advance ..

 

[rca]

your code could help us to understand your issue.

 

[rberek]

You cannot instantiate modules inside always blocks.

r.b.

 

[Muthuraja.M]

rberek :

Is it possible to develop flip flops by using tasks

 

[rberek]

Why, exactly, would you want to that? Assuming you wrote a module for the flip flip, Why not just instantiate the FF module directly in another module? As long as you do not instantiate it in an always or initial block.

r.b.

 

[Muthuraja.M]

Why, exactly, would you want to that? Assuming you wrote a module for the flip flip, Why not just instantiate the FF module directly in another module? As long as you do not instantiate it in an always or initial block.

r.b.

In if loop also the flip flop module cant be called. It shows an error like "the generate if condition must be a constant expression "

 

[rberek]

Of course it can't be "called" there.

Verilog is a hardware description language. Instantiating a module is like soldering a chip on a board. Once it is there, it is there forever. That is why you can't instantiate a module inside an if construct, or an always @ block, etc., because that implies conditional existence. That would be like having a PCB where the chips disappear or reappear.

It seems like you think modules are like C functions that are called by the code whenever necessary. This is not the case.

r.b.

 

[Muthuraja.M]

Thank u i was cleared and i have succeed.

I have one last doubt pls clarify this in verilog how the high impedance "Z" will be assigned for a register...

 

[ads-ee]

I have one last doubt pls clarify this in verilog how the high impedance "Z" will be assigned for a register...

Well you don't assign Z to a register.

high impedance values can only be assigned to the pins of a device as there are tri-state drivers in cell libraries for the I/O. I'm not even sure if they have tri-state drivers for internal buses. I certainly don't recall seeing them back when I was working on ASIC designs.

I get the impression you have a non-hardware background. If you don't have at least a working knowledge of how hardware is implemented. Like a 374 register in HW is actually 8 registers feeding tri-state drivers. I suggest you read a book on digital logic design before learning Verilog.

Regards

 

[vardan]

Thank u i was cleared and i have succeed.

I have one last doubt pls clarify this in verilog how the high impedance "Z" will be assigned for a register...

Think by register you mean reg type variables. The assignment is done exactly in the same way as assigning 1,0,x. Inside initial or always block, do blocking or non-blocking assignment.
You'll need to assign "Z" values in testbenches or when bidirectional buses are modeled.

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