how to use libraries in ncverilog

[sarfaraz.ahmed]

Hi I am running simulation on ncveriolg through command prompt.

Actually, I want that verilog code should use my library cells.
The library are in the path "/home/sarfaraz.ahmed/techlib/FreePDK45/osu_soc/lib/source/signalstorm/files/gscl45nm.lib"

how I include this library in our verilog code . The verilog code is written here :

module nand(a, b, out);

input a, b, ;
output out;
wire out;

NAND2X1 g118 (a, b, out);
endmodule

I want to use "NAND2X1" by my installed library . how I include and then simulate it correctly ?
Currently, it shows an error on NAND2X1.

Thanks

 

[anilineda]

Hi sarfaraz,

you should not include library cell like that,

point 1: doing simulation on verilog /vhdl code is called functional simulation.
point 2: doing simulation on the netlist is called GTS (gate-level simulation).

I think you are trying to do point 2. first do the synthesis, synthesis will produce a netlist file which contains all the mapped library cells .
now use irun command to do GLS.

if you want more information , then look for a GATE LEVEL SIMULATION pdf file in the cadence support website.
feel free to share back.

Regards,
Anil

 

[ThisIsNotSam]

Hi sarfaraz,


first do the synthesis, synthesis will produce a netlist file which contains all the mapped library cells .
now use irun command to do GLS.
l

Not that simple. The netlist will have the gates in there, but you have to point to a verilog file that models their behavior. Every standard cell library comes with one.