arunramnath
Junior Member level 1
I know we cannot use the force/release statements directly in an UVM run phase because of the interface based communication between TB and DUT.
In case I need to force a pin A in the DUT to logic 1, How can I go about it ?
I could not find any source to get this info.
In case I need to force a pin A in the DUT to logic 1, How can I go about it ?
I could not find any source to get this info.