x32 (not 36 as you have mentioned in the question) does mean that it is a 32 bit data width SDRAM. Make sure you are referring to the diagram from the correct datasheet.
AA (Rows) x BB (Columns) xx DD (Data bus width)
Correction to the earlier reply: There are four banks (not 32) as per the diagram. Only recently we are getting SDRAM chips with 8 banks, 32 banks is still far away i guess.
Just to continue with my earlier reply, the DDR memroy chip will have internal data bus width which is twice that at the external bus. By this it manages the double data rate with 2n prefetch. It captures 16 bits on positive edge and 16 bits on negative edge. The entire 32 bits are then used internally in one clock cycle. This also explains why there is x32 instead of x16 in the datasheet.
The burst length (BL) you have mentioned is the number of words (in this case 16 bits) you can read (or write) continuously without issuing the command again.
I hope it is bit clear now.