How to suppress Charge Injection in Sample Hold Circuit

Status
Not open for further replies.

girih192002

Full Member level 2
Joined
Aug 4, 2007
Messages
130
Helped
19
Reputation
38
Reaction score
11
Trophy points
1,298
Location
India
Activity points
2,115
Hi,

how to suppress charge injection effect in sample hold circuit ?
 

You minimize the switch size (works against minimum sample time / settling)
and/or inject a cancelling charge. But the charge required, will vary with
common mode position if you use simple gate drives (like CMOS logic).
 

Add dummy transistors with appropriate size.
 

Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…