I'd capture an application schematic to put
the "guts" in, and take stab at a topology to
work with, netlist it to SPICE and start poking
to see what it does (vs. what it should).
Small signal is not where I'd start, too much
of the universe is anything-but. Though some
prefer to "start small and zoom out" I prefer
the opposite and use SS analysis only for later
parameter simulations where the param of
interest is in fact a small-signal quantity. Too
many encounters with "guess that wasn't small
signal after all" (like transistor saturation, SOI
history effects, hysteretic circuits etc.).