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How to start ARM based SOC synthesis/verification?

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design_oriented

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Hi Guys,

I want to start a project in which I can synthesize and verify an ARM based SOC from scratch.

How and where do I start?

Do I have to use SystemC to develop the RTL code and then synthesize it?

Any help/comments are appreciated.

Thanks.
 

Thanks for the useful info, guys.

@amraldo,
Does that book use systemc or systemverilog for synthesis?

I am newbie so how easy is it is to translate between system verilog and systemc?

I would like to synthesize using systemc as it is free.

Can I take this systemc RTL synthesis netlist and then use prime time to run STA and get it signed off?

Thanks for your patience in this.
 

It uses verilog for hardware implementation and PLI for c to hardware interfacing
 

Thanks again.

Please correct me if I am wrong:

Here are the steps I will have to take to complete my project:

1. Get the IP core from ARM
2. Convert this to SystemC code
3. Synthesize this
4. Simulate and verification (write testbenches in systemC for this)

So what tools will I need to complete my project?

1. SystemC libraries and DevC++ for RTL coding
2. Which tool for synthesis?
3. Can I use Prime time for STA?

Are there any other tools I would need for this?
 

I m not into this for 4 years now.
I can't help you.
 

design_oriented said:
Thanks again.

Please correct me if I am wrong:

Here are the steps I will have to take to complete my project:

1. Get the IP core from ARM
2. Convert this to SystemC code
3. Synthesize this
4. Simulate and verification (write testbenches in systemC for this)

So what tools will I need to complete my project?

1. SystemC libraries and DevC++ for RTL coding
2. Which tool for synthesis?
3. Can I use Prime time for STA?

Are there any other tools I would need for this?

1. Yes.. costs lot of $..
2. No you dont convert to systemc, which is not suitable for synthesis. you use Verilog/VHDL for synthesis. Before that you need to run a lot of simulations, in which systemc could help.
3. yes. synthesize after simulations are ok.
4. goes earlier than 3.

Get xilinx/altera software for synthesis if it's school project only. otherwise you pay five figures to Synopsys/Cadence to get a commercial synthesizer.

PT is for STA.

How come you knew a lot of keywords but misplace them in wrong places? :D
 

IP from ARM ,, will be having golden verilog files, you can directly start synthesizing ARM core,
am not in to Verification but am in to ARM implementation ,
you can use Reference methodology flow given by ARM
sorry if am wrong, my knowledge is limited to block level implementation (ARM cores)
 

Thanks for the info.

@kel8157
You can tell from the buzzwords that I am a newbie :)

I am planning to first synthesize an ARM IP using say Xilinx. Where can I find some synthesizable ARM IP's ?

What are some other popular and free Verilog synthesizer tools used for this?

Once I have finished synthesizing the ARM IP, then I am planning to try an ARM implementation.
 

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