how to simulate TIA in sp?

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beabroad

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i am now designing a TIA in Cadence IC environment.

i know for LNA, i can use ports of 50ohm inner resistance for input and output ports, and use sp to simulate it.

however, for TIA, the input is current, and the port component output voltage only. so i want to know whether it is possible to simulate TIA using sp. thanks.
 

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