how to simulate the noise of pfd+cp+lpf using hspicerf ?

[pancho_hideboo]

But fundamental frequency is output frequency,isn't it?

No in your case.

And if you have to get the netlist, I will try to apply for an authority to paste the netlist here.

If you provide it, I can confirm from various aspects.

and somebody has the same issue as mine.

I don't think so.
I think simply fundamental frequency is not correct.

At least, frequency at "P4" can be never 200MHz/4.

Again surely confirm time period of all nodes.

 

[yxh12321]

hi pancho_hideboo,
Thank you very much.
I am so sorry that I failed to get you the netlist.

Again surely confirm time period of all nodes.

I checked the time period of all nodes and found 10n,20n,60n,120n.
I tried setting "beat period=120n",but it didn't work and "Conv norm=110e+03" all the time
Then I tried setting "beat period=240n",to my surprise,it converged finally.But I don't think the result is correct.I paste some pictures detailedly.

=====

====

====At first,"Conv norm=110e+03",then it reduced every time.

===

====

====

===

===It converged!!

====

====But I don't think the result is resonable.Look

1.The "Conv norm" is 76.5e-03,is it right? I simulate other dividers and they are all about 70e-12
2.When PSS converges,the freq=4.16667MHz+(10KHz->100MHz) in PNoise.The 4.16667MHz is just 240n which is beat period.I think it is wrong doing PNoise like this,am I right?And the phase noise is also awful.

Thank you again.

 

[pancho_hideboo]

Don't attach pictures of PSS/Pnoise setting GUI.
It is very difficult to see necessary information from those.
Always you attach many useless pictures.

Show me netlists regarding analysis statements, option statements and signal source definitions.
I wrote this repeatedly in this thread.

I checked the time period of all nodes and found 10n,20n,60n,120n.

There are many nodes in your circuit.
They are not only four nodes.

Surely confirm all nodes.
The Designer's Guide Community Forum - Beat frequency for a dual modulus divider

Then I tried setting "beat period=240n",to my surprise,it converged finally.
But I don't think the result is correct.

Rather my surprise is that you can't understand a working mechanism of your frequency divider at all.

Obviously your "relharmnum" is wrong in your Pnoise setting.
Show me time domain waveforms as results of PSS.

1.The "Conv norm" is 76.5e-03,is it right?

Right.
And it takes only 6 iterations to converge in Shooting-Newton-PSS.
So your circuit is very easy for Shooting-Newton-PSS.

2.When PSS converges,the freq=4.16667MHz+(10KHz->100MHz) in PNoise.

Again your "relharmnum" is improper in your Pnoise setting.

The 4.16667MHz is just 240n which is beat period.

Again don't use a term of "beat" !!

I think it is wrong doing PNoise like this, am I right?

Needless to say, wrong.

And the phase noise is also awful.

Again your "relharmnum" is improper in your Pnoise setting.

Again show me netlists regarding analysis statements, option statements and signal source definitions.


It seems a fundamental frequency of your circuit is "200MHz/48".
If you want to observe noise around "200MHz/4", you have to set "relharmnum" as "12" in Pnoise setting.
Your "maxsideband=7" is too small in Pnoise setting.
And you have to include "12" as "Output Harmonics" in PSS setting.
Surely read my appends in this thread.

pss pss fund=200M/48 harmsvec=[48 24 12 6 3 0] maxacfreq=10*200M
+ maxperiods=200 maxiters=15
+ tstab=1.2u // 5*fund_period=5*(48/200MHz)
+ outputtype=all
+ errpreset=moderate annotate=status

pnoise ( fout 0 ) pnoise sweeptype=relative relharmnum=12
+ start=10k stop=100M dec=11 maxsideband=10*48 annotate=status

As I've thought, your problem is very easy.

Surely understand a working mechanism of your frequency divider correctly before EDA Tool Play.
I also wrote this very early in this thread.

and somebody has the same issue as mine.

I don't think so.
I think simply fundamental frequency is not correct.
At least, frequency at "P4" can be never 200MHz/4.
Again surely confirm time period of all nodes.

How are they different ?
I don't think your problem can be resolved even if you use Cadence Spectre instead of Synopsys HSPICE.
Methodolgies of simulation are completely same even if you use any vendor's simulator.
I think you need a study of basic theory of PLL before EDA-Tool-Play.

All problem is simply that you can't understand a working mechanism of your frequency divider at all.

 

[yxh12321]

hi pancho_hideboo,
I am really very appreciate that you keep helping me so patiently.And every suggestion you

gave to me is very helpful.You make me know more about PLL and spectre.
Now the problem is solved and the simulation is running very slowly.So I will give you the

time domain waveforms as results of PSS later if you want to see.
I am a new guy in analog IC aera.This multiple mode divider is kinda digital circuit.So I

don't understand the working mechanism of it now.But I will make it.

Thank you very much again.

(By the way,I wish the manager won't delete this post.Because I can't find another way to thank pancho_hideboo.Thank you)

 

[pancho_hideboo]

You make me know more about PLL and spectre.

It is true for any vendor's simulator including Synopsys HSPICE.

And this thread is originally regarding Synopsys HSPICE not Cadence Spectre.

So I will give you the time domain waveforms as results of PSS later if you want to see.

Surely understand node location where its period is 48/200MHz=240nsec by yourself.

By the way,I wish the manager won't delete this post.

Rather I would like to delete all my appends in this thread completely since this thread is valueless for anyone.