Hi,everybody.
I want to make a SAR ADC, but I don't have any idea of simulating the index of
this kind of ADC. Can anybody show me how to simulate the performance of SAR
ADC, such as INL , DNL, SFDR.As the SAR ADC has to use multiple clock cycles to
complete a convertion, I can't test INL DNL with the ideal DAC behide ADC with ramping input.So how can I do it .I would appreciate if anybody give me some indication of show me some reference, thanks.
Hi,everybody.
I want to make a SAR ADC, but I don't have any idea of simulating the index of
this kind of ADC. Can anybody show me how to simulate the performance of SAR
ADC, such as INL , DNL, SFDR.As the SAR ADC has to use multiple clock cycles to
complete a convertion, I can't test INL DNL with the ideal DAC behide ADC with ramping input.So how can I do it .I would appreciate if anybody give me some indication of show me some reference, thanks.
For INL and DNL you have to know how does mismatch affect on choosen configuration. Simulation on the ideal circuit does not help you. You could see only comparator effect on INL and DNL (which should ideally does not affect on thoose values). You could introduce some mismatch in your components according to project specifications. for the worst case, and then to simulate ADC for different inputs , with small input step (<LSB/8 ).
However this is not usually possible for the whole input range, becaues it takes lot of time, but you can try it for some critical parts of the input voltages.
I use Hspice for my simulation. And I will deal with the test result in Matlab.
Added after 17 minutes:
To pixel & ashish_chauhan,
Thanks for your kindly reply.
But I still have some questions.
First,how do I introduce this mismatch?Is this mean that size my transistor with some mismatch deliberatly?It would be appreciated for giving me some more indication.As I just newly for doing this and having no idea.
Second,
Can I interpret the simulation of INL and DNL as such procedure.
Simulate my circuit with Hspice with ramping input-->then use some Matlab to deal
with the data get from Hspice.Is this right?
Thanks in advance.
I m new to behavioural modeling. Can any body list out the steps for behavioural modeling of SAR ADC using MATLAB and Simulink.
l have doubt like in simulink model should I write the transfer function of of diff. buliding block like comparators, DAC, SAR etc or make the blocks using architectural description of these devices using gates and transistors etc.